The present invention relates to an improvement in a semiconductor device of the CMOS (Complementary MOS) type.
An NMOS (N channel MOS) transistor is normally formed in the surface region of a silicon substrate having the (100) plane. This is because:
(1) The interfacial level (surface state density) between the silicon substrate and the silicon oxide film is at a minimum when the silicon substrate surface is in the (100) plane.
(2) The mobility of electrons in the (100) plane is the highest, as is disclosed in "Mobility Anisotropy of Electrons in Inversion Layers on Oxidized Silicon Surfaces", PHYSICAL REVIEW, Vol. 4, No. 6, 1953 p, FIG. 2. Therefore, the source-drain current of the NMOS transistor formed on the semiconductor substrate having the (100) plane provides the largest current.
Recently, the technology of CMOS transistors has advanced significantly. A CMOS transistor comprises a PMOS (P channel MOS) transistor and an NMOS transistor. The techniques applied in manufacturing NMOS transistors are also applied in the manufacture of CMOS transistors. Thus, a CMOS transistor is generally formed on the semiconductor substrate having the (100) plane. However, the mobility of holes is lowest in the (100) plane. The source-drain current provided by the PMOS transistor of this CMOS transistor is inevitably small. The PMOS transistor therefore fails to have desirable characteristics, even though the NMOS transistor of the CMOS transistor exhibits good characteristics. Consequently, the CMOS transistor, as a whole, does not have satisfactory characteristics.
CMOS transistors are also being made smaller. The smaller a CMOS transistor, the shorter its channel length. If the channel length is made too short, the velocity of electrons and the velocity of holes become saturated. It has been determined that the velocity of electrons is far more likely to be saturated than the velocity of holes. This fact becomes clear from FIGS. 1 and 2. Hence, in a CMOS made small and formed on a semiconductor substrate having a (100) plane, the advantage resulting from the NMOS transistor being formed in the (100) plane diminishes, while the disadvantage resulting from PMOS transistor being formed in the (100) plane persists. Consequently, the CMOS transistor, as a whole, still does not exhibit satisfactory characteristics.